[HDLBits] Dff16e

Create 16 D flip-flops. It's sometimes useful to only modify parts of a group of flip-flops. The byte-enable inputs control whether each byte of the 16 registers should be written to on that cycle. byteena[1] controls the upper byte d[15:8], while byteena[0] controls the lower byte d[7:0].

resetn is a synchronous, active-low reset.

All DFFs should be triggered by the positive edge of clk.

1.  
   module top_module (
2.  
   input clk,
3.  
   input resetn,
4.  
   input [1:0] byteena,
5.  
   input [15:0] d,
6.  
   output [15:0] q
7.  
   );
8.  
   always@(posedge clk) begin
9.  
   if(~resetn)
10.  
    q<=16'b0;
11.  
    else begin
12.  
    if(byteena[0])
13.  
    q[7:0]<=d[7:0];
14.  
    if(byteena[1])
15.  
    q[15:8]<=d[15:8];
16.  
    end
17.  
    end
18.  
    endmodule
19.  
     

这篇好文章是转载于：学新通技术网